Photonic Chips: Cracking the Computing Power Conundrum

source:GMW.CN

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Time:2026-06-16

Source: GMW.CN  16th Apr 2026

 

By Chang Lin (Researcher, School of Electronics, Peking University)

As artificial intelligence and large models evolve at an accelerated pace, computing power has become the strategic commanding height of technological development. However, traditional electronic chips, constrained by the speed of data movement, are emerging as a bottleneck for computing power improvement. Currently, photonic chip technology—a new type of chip that replaces electricity with light and integrates optoelectronics—is on the rise and gradually moving out of laboratories, providing a new solution for building a faster and more energy-efficient computing power infrastructure.

 

Ascend 384 super node applying optical interconnection technology. Photo by Xinhua News Agency

 

As Chips Get More Powerful, Where Is the Computing Power Bottleneck?

Open your phone, and you can generate a painting with an AI tool in just a few seconds; type a few sentences, and an intelligent assistant can respond fluently; various short video platforms can accurately capture users' interests and preferences to push personalized content... Artificial intelligence is entering our lives at an unprecedented speed and becoming an indispensable digital assistant. However, behind these seamless experiences lies an increasingly pressing problem: computing power anxiety.

 

As artificial intelligence models continue to expand, their parameter scales have grown from tens of millions to hundreds of billions, and computing demand is increasing exponentially. Cutting-edge applications such as large language models, autonomous driving, and image generation, in particular, have posed unprecedented challenges to chip performance, data transmission speed, and energy consumption. In this regard, an industry insider vividly put it: AI's "intelligence" is forged through high energy consumption and heat generation.

 

With chip performance continuously improving today, why does the "computing power bottleneck" still persist?

In fact, the computing power bottleneck is shifting to the information transmission links within the system. Training a large model usually requires thousands of GPU (Graphics Processing Unit) chips to work in tandem, yet the data transmission speed between GPUs is far lower than the data processing speed inside a single GPU, becoming a key factor restricting computing efficiency. A major reason for DeepSeek's rapid rise is that it has optimized the transmission efficiency between chips through innovations at the underlying software level, thereby significantly improving the efficiency of large-scale model training and inference, and further driving down inference costs and promoting broader technological accessibility.

 

However, the performance of a system is ultimately limited by hardware. Currently, data transmission between most chips still relies on "electrical interconnection" — transmitting electrical signals through metal wires. But this mature approach is facing three increasingly unavoidable challenges: first, bandwidth limitations. Electrical signals are susceptible to interference when propagating in wires, making it difficult to further increase their speed; second, high energy consumption. To maintain signal integrity, a large number of driver and compensation circuits are often required; third, poor scalability. As transmission distance increases, performance drops sharply.

 

So where lies the breakthrough? Scientists have turned their attention to "light" — based on photonic chips, optical signals traditionally used for long-distance communication are introduced between chips and even inside chips to realize "optical interconnection". This technological revolution known as "optoelectronic integration" is not only an innovation in communication methods, but also expected to reconstruct the underlying logic of the entire computing power architecture.

 

Wet process on the photonic chip pilot production line. Photo by Xinhua News Agency

 

How to Bring Light into Chips

Optical interconnection is widely used in long-distance data transmission, such as intercontinental interconnections, telecommunications backbone networks, and large-scale data centers. We are no strangers to "optical interconnection"—for example, fiber-to-the-home has significantly increased internet speeds. Inspired by this, the scientific and industrial communities have put forward a cutting-edge idea: can we bring "light" between chips, and even into the chips themselves, to improve the speed of signal transmission at the chip scale?

 

This idea has spawned two key technological paths: co-packaged optics (CPO) and optical input/output (OIO).

 

As the name suggests, co-packaged optics involves packaging photonic chips and electronic chips in the same system. In traditional solutions, photonic chips are usually placed separately from electronic chips at a considerable distance, requiring connections through wires/circuit boards, which suffer from signal loss and bandwidth bottlenecks. The idea of co-packaged optics is simply to "put them together"—assembled like Lego bricks into a single unit. By placing optical transceivers in close proximity to the main chip, signals travel almost directly into the photonic chip after leaving the electronic chip, eliminating long-distance electrical transmission. This drastically shortens the signal path, reduces latency, and improves the overall energy efficiency and bandwidth density of the system. Co-packaged optics is particularly suitable for use in data center switches and is currently a key area of investment for many domestic and international technology companies.

 

In contrast, optical input/output goes a step further. It is a design approach that embeds optical interconnection interfaces into the chip packaging layer, with the goal of achieving optical interconnection between chips. Optical input/output is not just about transmitting optical signals; it represents a deep integration of chip architecture and interconnection mechanisms. It imposes higher requirements on design processes, packaging technology, and photonic integration, but once realized, it will significantly enhance the collaborative efficiency between AI chips.

 

If co-packaged optics moves photonic chips to the "doorstep" of electronic chips, then optical input/output builds a "light highway" directly into the chips themselves. This technology has higher requirements for integration, cost, and power consumption, but it is also more suitable for scenarios such as AI computing and GPU clusters, making it an important direction for next-generation chip architectures.

In short, co-packaged optics brings photonic chips closer to electronic chips for more efficient transmission, while optical input/output opens "optical paths" between chips to accelerate AI models. Both technologies share the same goal: to make data travel faster, more reliably, and more energy-efficiently between chips.

 

What Are the Effects of Building "Light Bridges" Between Chips?

In recent years, with the continuous maturation of silicon photonic integration processes, the vision of "bringing light into chips" is rapidly becoming a reality. International semiconductor giants are accelerating their deployment in optical interconnection technology. For example, a well-known international company has launched its "Light Speed Networking Engine"—silicon photonic co-packaged optical switches: Spectrum-X and Quantum-X. Take Quantum-X as an example: it can transmit the data equivalent of 1.15 million high-definition movies per second, yet uses 65% less power than traditional solutions—equivalent to the annual electricity consumption of streetlights in a medium-sized city. Although China started relatively late in this field, its scientific research and industrial capabilities have developed rapidly in recent years, reaching internationally advanced levels in multiple key technologies and holding promise to become a disruptive force in the chip industry.

 

In recent years, the author's team has achieved 60 Tbps high-coherence optical interconnection links on silicon photonic chips, demonstrating the enormous potential of optical interconnection in terms of integration, speed, and energy efficiency. based on multi-wavelength light source technology, the system creates hundreds of interconnection channels on a single chip, achieving highly parallel information transmission. At the same time, this solution reduces the demand for traditional digital signal processors (DSPs) in coherent links, providing a solution to the dilemma where domestic DSP chips are constrained by advanced manufacturing processes and must rely on imports. Furthermore, combined with mature silicon-based processes, it has realized compact, highly stable integrated transceiver modules, making large-scale applications possible.

From optical cables for long-distance interconnections to "light bridges" between chips, optoelectronic integration is quietly changing the way we think about computing power.

 

In the past, we were accustomed to improving the performance of individual chips, pursuing smaller process nodes and higher frequencies. But with the exponential growth of AI model sizes, computing power is no longer just a competition of "individual combat" but a problem of "joint operations" coordination. And optical interconnection is providing an infrastructure-level solution for this coordination. It is foreseeable that in future data centers, AI chip groups, and even consumer electronics, we will see more and more applications of optical interconnection and photonic integration. They will become the solid foundation of the "intelligent society" and the invisible pillars supporting the information flood in the coming decades.

 

Just as railways were the infrastructure for the Industrial Revolution and power grids for the information age, photonic chips may well be the infrastructure for the next generation of computing power society. By building "bridges of light" between chips, we can move faster and farther into the future.

 

Guangming Daily (April 16, 2026, Page 16)Source: Guangming online - Guangming Daily